PIC16F84電子遊戯(74)サブページ
最終更新日:2002年6月16日
アヒルの乾電池チェッカー(1ページ)へ (2ページ)へ (3ページ)へ

アヒルの乾電池チェッカーの全ソースリスト
;**********************************************************************
;    Filename:	    ahiru2.asm                                           *
;    Date:          2002/6/2                                         *
;    File Version:                                                    *
;**********************************************************************

	list      p=16F84             ; list directive to define processor
	#include <p16F84.inc>         ; processor specific variable definitions

	__CONFIG   _CP_OFF & _WDT_OFF & _PWRTE_ON & _XT_OSC

;***** VARIABLE DEFINITIONS
w_temp        EQU     0x0C        ; variable used for context saving 
status_temp   EQU     0x0D        ; variable used for context saving


wait_data	EQU	0x15		;wait data ram

taihi		EQU	0x17		;taihi data
out_data	EQU	0x18		;out data

d_count		EQU	0x1d		;hyouji count data
count		EQU	0x1e		;warikomi count data


tm0_setdata	EQU	0xdf		;FFH-DFH=32 32*2=64usec
;**********************************************************************
		ORG     0x000             ; processor reset vector
  		goto    main              ; go to beginning of program


		ORG     0x004             ; interrupt vector location
		movwf   w_temp            ; save off current W register contents
		movf	STATUS,w          ; move status register into W register
		movwf	status_temp       ; save off contents of STATUS register
		;---------------------------------------------------------------
		bcf	INTCON,T0IF
		movlw	tm0_setdata
		movwf	TMR0

		incf	count,1
		;---------------------------------------------------------------
int_end
		movf    status_temp,w     ; retrieve copy of STATUS register
		movwf	STATUS            ; restore pre-isr STATUS register contents
		swapf   w_temp,f
		swapf   w_temp,w          ; restore pre-isr W register contents
		retfie                    ; return from interrupt
;--------------------------------------------------------------------------
main
		call	port_set
		movlw	02h
		movwf	PORTA
		movlw	00h
		movwf	PORTB

		call	set_dcount

		call	timer0_set

		movlw	00h
		movwf	out_data
;--------------------------------------
main_loop
		decf	d_count,1
		btfss	STATUS,2
		goto	main_led
		call	set_dcount
		call	keisoku
		call	henkan
		movwf	out_data

main_led
		movf	out_data,0
		movwf	PORTB
;---------------------------------------
		goto	main_loop
;-------------------------------------------------------------------------------

;-------------------------------------------------------------------------------
wait_0
		movlw	0ffh
		movwf	wait_data
		goto	wait_2
wait_1		
		movlw	0ffh
		movwf	wait_data
wait_2
		nop
		decfsz	wait_data,1
		goto	wait_2
		return
;-------------------------------------------------------------------------------
keisoku
		movlw	00h
		movwf	count
		call	ra0_out
		bcf	PORTA,0
		nop
		call	wait_1
		call	ra0_in
		bsf	INTCON,T0IE
keisoku2	nop
		btfsc	PORTA,1
		goto	keisoku2
		bcf	INTCON,T0IE
		return	
;------------------------------------------------------------------------------
set_dcount
		movlw	0xf0
		movwf	d_count
		return
;-------------------------------------------------------------------------------
ra0_out
					;RA0(OUT)
		bsf	STATUS,RP0
		bcf	TRISA,0
		bcf	STATUS,RP0
		return
;--------------------------------------------------------------------------------
ra0_in
					;RA0(IN)
		bsf	STATUS,RP0
		bsf	TRISA,0
		bcf	STATUS,RP0
		return
;--------------------------------------------------------------------------------


;------------------------------------------------------------------------------
henkan		movf	count,0
		movwf	taihi
		movlw	low(henkan_table)
		addwf	taihi,1
		movlw	high(henkan_table)
		movwf	PCLATH
		addcf	PCLATH,1
		movf	taihi,0
		movwf	PCL
henkan_table	;----------- 00
		retlw	020
		retlw	020
		retlw	020
		retlw	020
		retlw	020
		retlw	020
		retlw	020
		retlw	020
		retlw	020
		retlw	020
		retlw	020
		retlw	020
		retlw	020
		retlw	020
		retlw	020
		retlw	020
		;----------- 10	
		retlw	020
		retlw	020
		retlw	020
		retlw	020
		retlw	020
		retlw	020
		retlw	020
		retlw	020
		retlw	020
		retlw	020
		retlw	020
		retlw	020
		retlw	020
		retlw	020
		retlw	020
		retlw	020
		;----------- 20
		retlw	020
		retlw	020
		retlw	020
		retlw	020
		retlw	020
		retlw	020
		retlw	020
		retlw	020
		retlw	020
		retlw	020
		retlw	020
		retlw	020
		retlw	020
		retlw	020
		retlw	020
		retlw	020
		;----------- 30
		retlw	020
		retlw	020
		retlw	020
		retlw	001
		retlw	001
		retlw	001
		retlw	001
		retlw	001
		retlw	001
		retlw	001
		retlw	001
		retlw	001
		retlw	001
		retlw	001
		retlw	001
		retlw	001
		;----------- 40
		retlw	001
		retlw	001
		retlw	001
		retlw	001
		retlw	001
		retlw	001
		retlw	002
		retlw	002
		retlw	002
		retlw	002
		retlw	002
		retlw	002
		retlw	002
		retlw	004
		retlw	004
		retlw	004
		;----------- 50
		retlw	004
		retlw	004
		retlw	004
		retlw	004
		retlw	008
		retlw	008
		retlw	008
		retlw	008
		retlw	008
		retlw	008
		retlw	008
		retlw	010
		retlw	010
		retlw	010
		retlw	010
		retlw	010
		;------------ 60
		retlw	010
		retlw	010
		retlw	010
		retlw	010
		retlw	010
		retlw	010
		retlw	010
		retlw	010
		retlw	010
		retlw	010
		retlw	010
		retlw	010
		retlw	010
		retlw	010
		retlw	010
		retlw	010
		;------------ 70
		retlw	010
		retlw	010
		retlw	010
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		;----------- 80
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		;----------- 90
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		;----------- A0
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		;----------- B0
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		;----------- C0
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		;----------- D0
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		;----------- E0
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		;----------- F0
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080
		retlw	080

;------------------------------------------------------------------------------


;-------------------------------------------------------------------------------
port_set				;RA0,RA2,RA3,RA4(OUT)
					;RA1(IN)
					;RB0,RB1,RB2,RB3,RB4,RB5,RB6,RA7(OUT)
		bsf	STATUS,RP0
		clrf	TRISA
		bsf	TRISA,1
		nop
		clrf	TRISB
		bcf	STATUS,RP0
		return

timer0_set

		bsf	STATUS,RP0
		movlw	080h		;(1)PORTB NOT PULLUP
					;(0)INTEDG
					;(0)TOCS
					;(0)TOSE
					;(0)PSA
					;(000)1/2
		movwf	OPTION_REG
		bcf	STATUS,RP0

		movlw	tm0_setdata
		movwf	TMR0
		bsf	INTCON,T0IE
		bsf	INTCON,GIE
		return


		END                     ; directive 'end of program'

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